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Description
The LAN9115 is a full-featured, single-chip 10/100 Ethernet controller designed for embedded applications where performance, flexibility, ease of integration and system cost control are required. The LAN9115 has been architected to provide the best price-performance ratio for any 16-bit application with medium performance requirements. The LAN9115 is fully IEEE 802.3 10BASE-T and 802.3u 100BASE-TX compliant.
Title
10/100 Base-T/TX Ethernet Controller with 16 Bit Interface
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Easily interfaces to most 16-bit embedded CPU's Efficient architecture with low CPU overhead Integrated PHY; supports external PHY via MII
interface Supports audio & video streaming over Ethernet:Printers, kiosks, security systems General embedded applications Audio distribution systems Basic Cable, satellite, and IP set-top boxes Video-over IP Solutions, IP PBX & Video Phones Wireless routers & access points Digital video recorders
Non-PCI Ethernet controller for medium-performance applications - 16-bit interface - Burst-mode read support - External MII Interface
Eliminates dropped packets - Internal SRAM can store over 200 packets - Supports automatic or host-triggered PAUSE and back-pressure flow control
Minimizes CPU overhead - Supports Slave-DMA - Interrupt Pin with Programmable Hold-off timerReduces system cost and increases design flexibility - SRAM-like interface easily interfaces to most Embedded CPU's or SoC's - Low-cost, low--pin count non-PCI interface for embedded designs
- Numerous power management modes - Wake on LAN* - Magic packet wakeup* - Wakeup indicator event signal - Link Status Change
- Integrated Ethernet MAC and PHY - 10BASE-T and 100BASE-TX support - Full- and Half-duplex support - Full-duplex flow control - Backpressure for half-duplex flow control - Preamble generation and removal - Automatic 32-bit CRC generation and check-
ing - Automatic payload padding and pad removal - Loop-back modes- One 48-bit perfect address - 64 hash-filtered multicast addresses - Pass all multicast - Promiscuous mode - Inverse filtering - Pass all incoming with status report - Disable reception of broadcast packets
- Simple, SRAM-like interface - 16-bit data bus - Large, 16Kbyte FIFO memory that can be- Integral 1.8V regulator - General Purpose Timer - Support for optional EEPROM - Support for 3 status LEDs multiplexed with
* Third-party brands and names are the property of their respective owners.It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at docerrors@microchip.com. We welcome your feedback.
To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at: http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page. The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the revision of silicon and revision of document to which it applies. To determine if an errata sheet exists for a particular device, please check with one of the following: Microchip's Worldwide Web site; http://www.microchip.com Your local Microchip sales office (see last page) When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are using.
Register on our web site at www.microchip.com to receive the most current information on all of our products.
1.0 General Description 4 2.0 Pin Description and Configuration 8 3.0 Functional Description 16 4.0 Internal Ethernet PHY 51 5.0 Register Description 58 6.0 Timing Diagrams 95 7.0 Operational Characteristics 105 8.0 Package Outline : 109 Appendix A: Data Sheet Revision History : 110 The Microchip Web Site : 111 Customer Change Notification Service : 111 Customer Support : 111 Product Identification System : 112
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LAN9115-MT
LAN9115-MT has several brands around the world that may have alternate names for LAN9115-MT due to regional differences or acquisition. LAN9115-MT may also be known as the following names:
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