AD8197BASTZ

FEATURES

4 inputs, 1 output HDMI/DVI links Enables HDMI 1.3-compliant receiver Pin-to-pin compatible with the AD8197A

4 TMDS channels per link Supports 250 Mbps to 2.25 Gbps data rates Supports 25 MHz to 225 MHz pixel clocks Equalized inputs allow use of long HDMI cables (20 meters at 2.25 Gbps) Fully buffered unidirectional inputs/outputs Per input switchable, 50 on-chip terminations Switchable output 50 on-chip terminations Pre-emphasized outputs Low added jitter Single-supply operation (3.3 V)

4 auxiliary channels per link Bidirectional unbuffered inputs/outputs Flexible supply operation 5 V) HDCP standard compatible Allows switching of DDC bus and 2 additional signals

Output disable feature Reduced power dissipation Removable output termination Allows building of larger arrays

Two AD8197Bs support HDMI/DVI dual link Standards compatible: HDMI receiver, HDCP, DVI Serial (I2C slave) and parallel control interface 14 mm LQFP, Pb-free package

APPLICATIONS
Multiple input displays Projectors A/V receivers Set-top boxes Advanced television (HDTV) sets

The is an HDMITM/DVI switch featuring equalized TMDS® inputs and pre-emphasized TMDS outputs, ideal for systems with long cable runs. The AD8197B offers individual control of the on/off state of the TMDS input termination resistors via I2C® control. Outputs can be set to a high impedance state to reduce the power dissipation and/or to allow the construction of larger arrays using the wire-OR technique.

The AD8197B is provided a 100-lead LQFP, Pb-free, surfacemount package, specified to operate over the to +85°C temperature range.

1. Supports data rates to 2.25 Gbps, enabling 1080p deep color (12-bit color) HDMI formats and greater than UXGA × 1200) DVI resolutions.

2. Input cable equalizer enables use of long cables at the input (more than 20 meters of 24 AWG cable at 2.25 Gbps).

3. Auxiliary switch routes a DDC bus and two additional signals for a single-chip, HDMI 1.3 receive-compliant solution.

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Thermal Resistance : 5 Maximum Power Dissipation : 5 ESD Caution : 5 Pin Configuration and Function Descriptions : 6 Typical Performance Characteristics : 9 Theory of Operation : 13 Introduction : 13 Input Channels : 13 Output Channels : 13 Auxiliary Switch : 14 Serial Control Interface : 15 Reset : 15 Write Procedure : 15 Read Procedure : 16

Switching/Update Delay : 16 Parallel Control Interface : 17 Serial Interface Configuration Registers : 18

High Speed Device Modes Register : 19 Auxiliary Device Modes Register : 19 Receiver Settings Register : 19 Input Termination Select Register 1 and Register : 19 Receive Equalizer Register 1 and Register : 19 Transmitter Settings Register : 20 Parallel Interface Configuration Registers : 21 High Speed Device Modes Register : 22 Auxiliary Device Modes Register : 22 Input Termination Resistor Control Register 1 and Register : 22 Receive Equalizer Register 1 and Register : 22 Transmitter Settings Register : 22 Application Information : 23 Pinout : 23 Cable Lengths and Equalization : 23 PCB Layout Guidelines : 24 Outline Dimensions : 28 Ordering Guide : 28

SPECIFICATIONS

= 27°C, AVCC 3.3 V, VTTI 3.3 V, VTTO 3.3 V, DVCC 3.3 V, AMUXVCC 5 V, AVEE 0 V, DVEE 0 V, differential input swing = 1000 mV, TMDS outputs terminated with external 50 resistors 3.3 V, unless otherwise noted.

Maximum Data Rate (DR) per Channel Bit Error Rate (BER) Added Deterministic Jitter Added Random Jitter Differential Intrapair Skew Differential Interpair Skew1 EQUALIZATION PERFORMANCE Receiver (Highest Setting)2 Transmitter (Highest Setting)3 INPUT CHARACTERISTICS Input Voltage Swing Input Common-Mode Voltage (VICM) OUTPUT CHARACTERISTICS High Voltage Level Low Voltage Level Rise/Fall Time to 80%) INPUT TERMINATION Resistance AUXILIARY CHANNELS On Resistance, RAUX On Capacitance, CAUX Input/Output Voltage Range POWER SUPPLY AVCC QUIESCENT CURRENT AVCC

Single-ended high speed channel Single-ended high speed channel
High speed switching register: HS_CH All other configuration registers