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SN74HC623N These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.
The ’HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA\) inputs.
OEAB and OEBA\ disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.
  • SN74HC623N
  • SN74HC623N
  • SN74HC623N
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Description

These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing. The ’HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA\) inputs. OEAB and OEBA\ disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.

Not found, similar datasheet recommended

Title

Octal Bus Transceivers With 3-State Outputs

  • ECAD Module
  • Series: 74HC
  • Brand: Texas Instruments
  • DateCode: 0345+
  • Package / Case: DIP20
  • Packaging: Tube
  • Part Status: Active
  • Logic Type: Transceiver, Non-Inverting
  • Number of Elements: 1
  • Number of Bits per Element: 8
  • Input Type: -
  • Output Type: Push-Pull
  • Current - Output High, Low: 7.8mA, 7.8mA
  • Voltage - Supply: 2 V ~ 6 V
  • Operating Temperature: -40°C ~ 85°C (TA)
  • Mounting Type: Through Hole
  • Supplier Device Package: 20-PDIP

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ECAD Module

Product Attributes

  • Description: The SN74HC623N is a high-speed CMOS 8-bit shift register fabricated with silicon gate C2MOS technology. Features: High-Speed Operation: tpd = 10 ns (typ) at VCC = 5 V Low Power Consumption: ICC = 1 μA (max) at TA = 25°C High Noise Immunity Characteristic of CMOS Devices Input Clamp Diodes Outputs Source/Sink 24 mA Outputs Can Be Tied Directly to CMOS, NMOS, and TTL Operating Voltage Range of 2 V to 6 V Applications: Data Storage Registers Serial-to-Parallel Conversion Shift Register Counters Frequency Division Data Transmission Data Acquisition Systems (For reference only)

Preview of the first 3 pages of the data sheet

  • SN74HC623N's pdf picture 1
  • SN74HC623N's pdf picture 2
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D Wide Operating Voltage Range V D High-Current 3-State Outputs Can Drive Up

D Low Power Consumption, 80-µA Max ICC D Typical tpd D ±6-mA Output Drive V D Low Input Current 1 µA Max D Lock Bus-Latch Capability D True Logic

These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing.

The 'HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA) inputs.

OEAB and OEBA disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, VCC. 7 V Input clamp current, IIK (VI VI > VCC) (see Note ±20 mA Output clamp current, IOK (VO VO > VCC) (see Note ±20 mA Continuous output current, IO (VO 0 to VCC). ±35 mA Continuous current through VCC or GND. ±70 mA Package thermal impedance, JA (see Note 2): DW package. 58°C/W

N package. 69°C/W NS package. 60°C/W Storage temperature range, Tstg. to 150°C

Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7.

NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)

PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.

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    • SN74HC623N These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing. The ’HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA\) inputs. OEAB and OEBA\ disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.
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