AD537SPECIFICATIONS (typical @ +25C with VS (total) 36 V, unless otherwise noted)
fMAX = 10 kHz fMAX = 100 kHz Full-Scale Calibration Error = 0.01 µF, IIN 1.000 mA vs. Supply (fMAX < 100 kHz) vs. Temp (TMIN to TMAX)
Single Supply Dual Supply Input Bias Current
0 to (+VS 4) Volts (min) VS to (+VS 4) Volts (min)
(Trimmable in "D" Package Only) vs. Supply vs. Temp (TMIN to TMAX) Safe Input Voltage3
vs. Temp (TMIN to TMAX) vs. Supply Output Resistance4 Absolute Temperature Reference5
Initial Calibration @ +25°C Slope Error from 1.00 mV/K
VOUT 0.4 V max (TMIN to TMAX) 20 mA min Output Leakage Current in Logic "1"
(TMIN to TMAX) Logic Common Level Range
**Specifications same 1Nonlinearity is specified for a current input level (IIN) to the converter from to 1000 µA. Converter has 100% overrange capability up to IIN 2000 µA with slightly reduced linearity. Nonlinearity is defined as deviation from a straight line from zero to full scale, expressed as a percentage of full scale. 2Guaranteed not tested. 3Maximum voltage input level is equal to the supply on either input terminal. However, large negative voltage levels can be applied to the negative terminal if the input is scaled to
a nominal 1 mA full scale through an appropriate value resistor (See Figure 2). 4Loading the 1.0 volt or 1 mV/K outputs can cause a significant change in overall circuit performance, as indicated in the applications section. To maintain normal operation,
these outputs should be operated into the external buffer or an external amplifier. 5Temperature reference output performance is specified from to +70°C for "J" and "K" devices, to +125°C for "S" model. 6D = Ceramic DIP; H = Hermetic Metal Can. For outline information see Package Information section. 7For AD537/883B specifications, refer to Analog Devices Military Products Databook.
CIRCUIT OPERATION Block diagrams of the AD537 are shown above. A versatile operational amplifier (BUF) serves as the input stage; its purpose is to convert and scale the input voltage signal to a drive current in the NPN follower. Optimum performance is achieved when, at the full-scale input voltage, 1 mA drive current is delivered to the current-to-frequency converter. The drive current to the current-to-frequency converter (an astable multivibrator) provides both the bias levels and the charging current to the externally connected timing capacitor. This "adaptive" bias scheme allows the oscillator to provide low nonlinearity over the entire current input range to 2000 µA. The square wave oscillator output goes to the output driver which provides a floating base drive to the NPN power transistor. This floating drive allows the logic interface to be referenced to a different level than VS. The "SYNC" input ("D" package only) allows the oscillator to be slaved to an external master oscillator; this input can also be used to shut off the oscillator.
The reference generator uses a bandgap circuit (this allows single-supply operation to 4.5 volts which is not possible with low T.C. Zeners) to provide the reference and bias levels for the amplifier and oscillator stages. The reference generator also provides the precision, low T.C. 1.00 volt output and the VTEMP output which tracks absolute temperature at 1 mV/K.
V-F CONNECTION FOR POSITIVE INPUT VOLTAGES The positive voltage input range is from VS (ground in single supply operation) to 4 volts below the positive supply. The connection shown in Figure 1 provides a very high (250 M) input impedance. The input voltage is converted to the proper drive current at Pin 3 by selecting a scaling resistor. The full-scale current is 1 mA, so, for example a 10 volt range would require a nominal 10 k resistor. The trim range required will depend on capacitor tolerance. Full-scale currents other than 1 mA can be chosen, but linearity will be reduced; mA is the maximum allowable drive.
As indicated by the scaling relationship in Figure 0.01 µF timing capacitor will give a 10 kHz full-scale frequency, and 0.001 µF will give 100 kHz with 1 mA drive current. The maximum frequency is 150 kHz. Polystyrene or NPO ceramic capacitors are preferred for T.C. and dielectric absorption; polycarbonate or mica are acceptable; other types will degrade linearity. The capacitor should be wired very close to the AD537.
Figure 1. Standard V-F Connection for Positive Input Voltages
V-F CONNECTIONS FOR NEGATIVE INPUT VOLTAGE OR CURRENT A wide range of negative input voltages can be accommodated with proper selection of the scaling resistor, as indicated in Figure 2. This connection, unlike the buffered positive connection, is not high impedance since the 1 mA F.S. drive current must be supplied by the signal source. However, very large negative voltages beyond the supply can be handled easily; just modify the scaling resistors appropriately. Diode (HP50822811) is necessary for overload and latchup protection for current or voltage inputs.
If the input signal is a true current source, R1 and R2 are not used. Full-scale calibration can be accomplished by connecting 200 k pot in series with a fixed 27 k from Pin 7 to VS (see calibration section, below).
Figure 2. V-F Connections for Negative Input Voltage or Current
CALIBRATION There are two independent adjustments: scale and offset. The first is trimmed by adjustment of the scaling resistor R and the second by the (optional) potentiometer connected to +VS and the VOS pins ("D" package only). Precise calibration requires the use of an accurate voltage standard set to the desired FS value and a frequency meter; a scope is useful for monitoring output waveshape. Verification of linearity requires the availability of a switchable voltage source (or a DAC) having a linearity error below ± 0.005%, and the use of long measurement intervals to minimize count uncertainties. Every AD537 is automatically tested for linearity, and it will not usually be necessary to perform this verification, which is both tedious and time-consuming.
Although drifts are small it is good practice to allow the operating environment to attain stable temperature and to ensure that the supply, source and load conditions are proper. Begin by setting the input voltage 1/10,000 of full scale. Adjust the offset pot until the output frequency 1/10,000 of full scale (for example 1 Hz for of 10 kHz). This is most easily accomplished using a frequency meter connected to the output. Then apply the FS input voltage and adjust the gain pot until the desired FS frequency is indicated. In applications where the FS input is small, this adjustment will very slightly affect the offset voltage, due to the input bias current of the buffer amplifier. A change in R will affect the input by approximately 100 µV, which is as much mV FS range. Therefore, it may be necessary to repeat the offset and scale adjustments for the highest accuracy. The design of the input amplifier is such that the input voltage drift after offset nulling is typically below l µV/°C.
Required
