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74HC138D
74HC138D has several brands around the world that may have alternate names for 74HC138D due to regional differences or acquisition. 74HC138D may also be known as the following names:
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Description
74HC138D
Stock:33893 |
Philips 03+ |
≥1: PHP14.87684 PHP13.38914 ≥10: PHP10.62637 PHP9.56369 ≥50: PHP8.50110 PHP7.65097 ≥100: PHP7.65097 PHP6.88583 ≥150: PHP7.22587 PHP6.50330 ≥200: PHP7.01340 PHP6.31204 ≥500: PHP6.92857 PHP6.23569 ≥1000: PHP6.84326 PHP6.15895 ≥3000: PHP6.80084 PHP6.12078
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Inquiry
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74HC138D
Stock:10000 |
NXP Semiconductors 10+PBF |
≥1: PHP13.73405 PHP12.91002 ≥10: PHP9.81002 PHP9.22142 ≥50: PHP7.84800 PHP7.37712 ≥100: PHP7.06325 PHP6.63943 ≥150: PHP6.67080 PHP6.27059 ≥200: PHP6.47433 PHP6.08588 ≥500: PHP6.39639 PHP6.01258 ≥1000: PHP6.31740 PHP5.93839 ≥3000: PHP6.27843 PHP5.90174
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Inquiry
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74HC138D
Stock:75 |
NXP Semiconductors 1048+ |
IC DECODER 3-8 LINE 16SOP |
≥1: PHP3.69724 PHP3.32752
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Inquiry
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Out of stock |
74HC138D
Stock:45 |
NXP Semiconductors 1946+ |
≥1: PHP7.05837 PHP6.63487
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Inquiry
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74HC138D
Stock:37643 |
NXP Semiconductors 1431+ |
≥1: PHP40.01344 PHP36.01210 ≥5: PHP32.01075 PHP28.80968 ≥10: PHP18.40618 PHP16.56556 ≥20: PHP16.00538 PHP14.40484 ≥50: PHP14.40484 PHP12.96435 ≥100: PHP14.00470 PHP12.60423 ≥200: PHP13.60457 PHP12.24411 ≥500: PHP13.20444 PHP11.88399 ≥1000: PHP12.80430 PHP11.52387
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Inquiry
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74HC138D
Stock:223 |
PHI 04/00+ |
IC DECODER 3-8 LINE 16SOP |
≥1: PHP12.80430 PHP11.52387
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Inquiry
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74HC138D
Stock:39180 |
NXP Semiconductors 10+ |
IC DECODER 3-8 LINE 16SOP |
≥1: PHP3.20108 PHP2.88097
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Inquiry
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74HC138D
Stock:27 |
PHI 0005+ |
≥1: PHP11.20376 PHP10.53154
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Inquiry
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74HC138D
Stock:128 |
NXP Semiconductors 1248 |
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74HC138D
Stock:1790 |
NXP Semiconductors 2010 |
≥1: PHP11.20376 PHP10.08339
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Inquiry
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FEATURES
● Demultiplexing capability
● Multiple input enable for easy expansion
● Ideal for memory chip select decoding
● Active LOW mutually exclusive outputs
● Output capability: standard
● ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT138 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT138 decoders accept three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active LOW outputs (Y 0 to Y 7).
The"138" features three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH This multiple enable function allows easy parallel expansion of the"138"to a 1-of-32 (5 lines to 32 lines) decoder with just four”138” ICs and one inverter.
The "138"can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active HIGH or LOW state.
The "138" is identical to the“238" but has inverting outputs.
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Freight calculation
Express:(FEDEX, UPS, DHL, TNT)Free shipping on first 0.5kg for orders over PHP11045.15,Overweight will be charged separately
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