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Description
The MEC140X/1X family is a highly-configurable, mixed signal, advanced I/O controller architecture. MEC1404 is a keyboard and embedded controller customized for notebooks and tablet platforms. As a cost-effective system solution, it incorporates a 32-bit MIPS32 M14K Microcontroller core with 128KB of closely-coupled SRAM for code and data that loads from SPI Flash. Designers can leverage the host SPI-flash (used for BIOS storage) for non-volatile EC firmware storage. Microchip?s MEC14XX family reduces the system bill-of-materials cost by providing a flexible arrangement that allows multiple I/O signals to be configured to support either 3.3V or 1.8V. This eliminates the need for external voltage translators The MEC1406 communicates with the system host through Intel Low Pin Count (LPC) or I2C. All members of the MEC14XX family are pin and register compatible and are supported by Microchip?s development tools. Examples include the MPLAB? XC Compilers, the MPLAB REAL ICE?In-Circuit Emulator (part # DV244005), MPLAB ICD 3 In-Circuit Debugger (part # DV164035) and PICkit? 3 Starter Kit (part # DV164130).
Title
Embedded Controller
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- 32kHz Crystal (XTAL) Supported - Single-Ended 32kHz Clock Source LPC Host Interface - LPC Specification 1.1 Compatible - LPC I/O and Memory Cycles Decoded - Supports optional signals: CLKRUN#, LPCPD#, SERIRQ, SMI#, EC_SCI# (ACPI PME Event) - Supports 19.2 MHz to 33 MHz nominal bus clock speeds Configuration Register Set - Compatible with ISA Plug-and-Play Standard - EC-Programmable Base Address 8042 Emulated Keyboard Controller - 8042 Style Host Interface - Port 92 Legacy A20M Support - Fast GATEA20 & Fast CPU_RESET System to EC Message Interface - One Embedded Memory Interface - Host Serial or Parallel IRQ Source - Provides Two Windows to On-Chip SRAM for
Host Access - Two Register Mailbox Command Interface - Mailbox Registers Interface - Thirty-two 8-Bit Scratch Registers - Two Register Mailbox Command Interface - Two Register SMI Source Interface - Five ACPI Embedded Controller Interfaces - Four EC Interfaces - One Power Management Interface
Deep Sleep States Trace FIFO Debug Port (TFDP) Internal DMA Controller- Hardware or Firmware Flow Control - Firmware Initiated Memory-to-Memory transfers - 7-Hardware DMA Channels support three
SMBus Master/Slave Controllers and one SPI Controller - Hardware CRC-32 Generator on Channel 0 Secure Boot ROM Loader - 4 Code Images in Shared Flash Supported - Crisis Recovery over Keyboard matrix Scan Pins - Supports CRC-32 and AES-128 Encryption Vectored Interrupt Controller - Maskable Interrupt controller - Maskable Hardware Wake-Up Events - Supports legacy aggregated mode - Supports Vector Generation per Status Bit Programmable 16-bit Counter/Timer Interface - Four 16-bit Auto-reloading Counter/Timer Instances - Two Operating Modes per Instance: Timer and One-shot. 32-bit RTOS Timer - Runs Off 32kHz Clock Source - Continues Counting in all the Chip Sleep States Regardless of Processor Sleep State - Counter is Halted when Embedded Controller is Halted (e.g., JTAG debugger active, break points) - Generates wake-capable interrupt event Watch Dog Timer (WDT) Hibernation Timer Interface - One 32.768 KHz Driven Timer - Programmable Wake-up from to 128 Minutes Week Timer - System Power Present Input Pin
- Week Alarm Event only generated when System Power is Available72.67 hours time-out - 1 Second and Sub-second Interrupts Battery-Powered General Purpose Output (BGPO) VBAT-Powered Control Interface (VCI) - 2 Active-low VCI Inputs - 1 Active-high VCI Input - 1 Active-high VCI Output Pin - Optional filter and latching
Power-Fail Status Register Port 80 BIOS Debug Port- Two Ports, Assignable to Any LPC IO Address - 24-bit Timestamp with Adjustable Timebase - 16-Entry FIFO PECI Interface 3.0 Two Programmable Comparators - 8 Bit Resolution - Independent Outputs per Comparator - Option to Use Pin or Programmable Voltage Ref-
erence Input - Can be used for Thermistor Voltage Sensing Integrated Standby Power Reset Generator XNOR Test Mode
Enhanced Serial Peripheral Interface (eSPI) - Intel eSPI Specification compliant - Supports four channels/interfaces: - Peripheral channel Interface - Virtual Wire Interface - Out of Band Channel Interface - Flash Channel Interface - Supports EC Bus Master to Host Memory
Internal Memory - Boot ROM 32 kB Data Optimized SRAM - Code Optimized SRAM Options from - 64 Bytes Battery Powered SRAM
Keyboard Matrix Scan Controller - Supports 18x8 Matrix - Pre-Drive Mode SupportedUp To Three EC-based SMBus 2.0 Host Controllers - Allows Master or Dual Slave Operation - Controllers are Fully Operational on Standby Power - I2C Datalink Compatibility Mode - Multi-Master Capable - Supports Clock Stretching - Programmable Bus Speeds - 1 MHz Capable - SMBus Time-outs Interface to 6 Port Flexible Multiplexing to 5 ports with or 3.3V Configurable Input Threshold - 1 port with VTT level signaling (i.e., AMD SBTSI Port) - Supports DMA Network Layer
- Independent Hardware Driven PS/2 Ports - Fully functional on Main and/or Suspend Power - PS/2 Edge Wake Capable - 3.6V Tolerant I/O Suitable for Internal Board
- Inputs - Asynchronous rising and falling edge wakeup detection Interrupt High or Low Level- Pull up or pull down resistor control - Automatically disabling pull-up resistors when output driven low - Automatically disabling pull-down resistors when output driven high
- Group- or individual control of GPIO data. Up To Three LEDswaveforms - Operational in EC Sleep States One Serial Peripheral Interface (SPI) Controller - Master Only SPI Controller - Mappable to three ports (only 1 port active at a
time) - 1 shared SPI Interface. - 1 General Purpose SPI Interface (packageNon-Linearity of ±0.5 LSB - External Analog Voltage Reference DAC Interface to 2 Channels - 8 Bit Resolution - External Analog Voltage Reference FAN Support to 8 Programmable Pulse-Width Modulator
(PWM) Outputs, for Fan or General Use - Multiple Clock Rates & 16-Bit OFF CountersThis table shows the total number of instances available per product. However, not all features may be used simultaneously since they are multiplexed on the same pins. See the Pin Description chapter to determine specific chip configuration options.
LPC I2C eSPI LPC I2C eSPI LPC I2C eSPISome Part number from the same manufacture
Same catergory
11 buyer reviews from Singapore
George Chan
Length of registration:16 years
The goods have been received. The packaging is very good. By the way, there are not a few in the list. The logistics is also very fast
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09/02/2022
Vincent Loh
Length of registration:5 years
Good
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03/18/2019
Steven Tan
Length of registration:6 years
Very satisfied with
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11/28/2018
Doris Boo
Length of registration:14 years
Very well-packed
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01/05/2017
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All UTSOURCE purchases have a 60 days money back return policy, plus a 90 days UTSOURCE warranty against any manufacturing defects.This warranty shall not apply to any item where defects have been caused by improper customer assembly, failure by customer to follow instructions, product modification, negligent or improper operation.
MEC1404-NU
MEC1404-NU has several brands around the world that may have alternate names for MEC1404-NU due to regional differences or acquisition. MEC1404-NU may also be known as the following names:
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