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Description: The 74AC74SC is a dual D-type flip-flop with a clock (CP) and a reset (R) input. It is a high-speed CMOS device with a propagation delay of 8.5 ns. Features: High-speed CMOS Low po
Stock:10000
Minimum:2
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SOP-20
TI9
These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with an enable input. The 'LS377, 'LS378, and 'LS379 devices are similar to 'LS273, 'LS174, and 'LS175, respectively, but feature a common enable instead of a common clear. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if the enable input G\ is low. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The circuits are designed to prevent false clocking by transitions at the G\ input. These flip-flops are guaranteed to respond to clock frequencies ranging from 0 to 30 MHz while maximum clock frequency is typically 40 megahertz. Typical power dissipation is 10 milliwatts per flip-flop.
Stock:10000
Minimum:3
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TSSOP-14
Texas Instruments
Dual D-type flip-flop with set and reset; positive-edge trigger - Description: Dual D-Type Flip-Flop with Set and Reset; Positive-Edge Trigger ; Fmax: 170 @ 5 V MHz; Logic switching levels: CMOS ; Output drive capability: +/- 8 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 3.7@5 V ns; Voltage: 2.0-5.5 V; Package: SOT402-1 TSSOP14; Container: Reel Pack, SMD, 13"
Stock:10000
Minimum:2
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SOP-20
FSC
Octal D Flip-Flop with Clear; Package: SOIC-Wide; No of Pins: 20; Container: Rail
Stock:10000
Minimum:4
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VSSOP-8
Fairchil
06+
TinyLogic UHS D-Type Flip-Flop with Preset and Clear
Description: The NC7SZ74K8X is a single 2-input positive-NAND Schmitt trigger logic gate from Fairchild Semiconductor. It is housed in a VSSOP-8 package. Features: Low power consumption High noise
Stock:10000
Minimum:12
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Stock:10000
Minimum:2
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The NL17SZ74USG is a high-speed, low-power, single-pole double-throw (SPDT) analog switch from ON Semiconductor. It is designed for use in applications requiring low on-resistance and low power consum
Stock:10000
Minimum:3
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Description: Octal D-Type Flip-Flop with 3-State Outputs Features: Inputs Include Clamp Diodes Outputs Source/Sink 24 mA Outputs Are TTL Compatible Outputs Have 3-State Capability Outputs
Stock:10000
Minimum:2
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DIP-20P
National Semiconductor
83+
Octal 3-STATE D-Type-Edge-Triggered Flip-Flops; Package: DIP; No of Pins: 20; Container: Rail
The DM74ALS374N is a 20-pin DIP (dual in-line package) logic device manufactured by National Semiconductor. It is a low-power, high-speed, octal transparent latch with 3-state outputs. The device is d
Stock:10000
Minimum:4
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DIP-16
National Semiconductor
Zener Diode 225 mW 2.4 V ±5%SOT-23; Package: SOT-23 TO-236 3 LEAD; No of Pins: 3; Container: Tape and Reel; Qty per Container: 10000
Description: Quad D-Type Flip-Flop Features: Low power consumption High noise immunity High speed operation Inputs accept voltages up to 5.5V Outputs source/sink 24mA Compatible with TTL
Stock:10000
Minimum:3
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Stock:10000
Minimum:2
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SOP-20
Low Voltage Octal D-Type Flip-Flop with 5V Tolerant Inputs and Outputs; Package: SOIC-Wide; No of Pins: 20; Container: Rail
Stock:10000
Minimum:2
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SOP20
FSC
Octal D-Type Flip-Flop; Package: SOIC-Wide; No of Pins: 20; Container: Rail
Stock:10000
Minimum:2
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DIP-14
Ti/mot
500mA, 5V,±4% Tolerance, Negative Voltage Regulator, Ta = 0°C to +125°C; Package: TO-220, SINGLE GAUGE; No of Pins: 3; Container: Rail; Qty per Container: 50
Description: The SN74LS73AN is a dual positive edge-triggered J-K flip-flop with individual J, K, clock, set and reset inputs, and complementary Q and Q outputs. Features: - Positive edge-triggere
Stock:10000
Minimum:2
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Stock:10000
Minimum:2
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Stock:10000
Minimum:1
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DIP-16
PH2
Dual JK flip-flop - Description: Dual JK Flip-Flop ; Fmax: 30 @ 15 V MHz; Logic switching levels: CMOS ; Number of pins: 16 ; Output drive capability: +/- 2.4 mA @ 15 V ; Power dissipation considerations: Low Power or Automotive Applications ; Propagation delay: 30@15V ns; Voltage: 4.5-15.5; Package: SOT38-4 DIP16; Container: Bulk Pack, CECC
Description: HEF4027BP is a dual 4-input NAND Schmitt trigger gate. Features: Low power consumption High noise immunity High input impedance High speed Low input current Low output
Stock:10000
Minimum:3
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Stock:10000
Minimum:3
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CDIP16
On Semi
01+
Dual In/Single Out Autoswitching Power MUX, Manual/Auto Sw, Adj. Cur Limit, Adj. Vol Threshold 8-TSSOP -40 to 85
Stock:10000
Minimum:1
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SN74ALS874BNT is a 24-pin DIP (dual in-line package) integrated circuit (IC) manufactured by Texas Instruments (TI). It is a synchronous 4-bit up/down binary counter with multiplexed outputs. Descrip
Stock:10000
Minimum:1
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Stop production experts, we can provide a large number of electronic components that have been stopped production and are difficult to find, to facilitate the maintenance company