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Inicio > Componentes Electrónicos > Chips IC > Lógica - Chanclas
DIP
Fairchild
0724+
These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.
Description: The CD4013BCN is a dual D-type flip-flop with complementary outputs. It has two independent data inputs (D and D) and two independent clock inputs (CP and CP). Features: * High speed: tp
Depósito:10000
Mínimo:3
Favorita
DIP
On Semiconductor
0236+
These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.
Description: The MC74ACT377N is a 3-state octal D-type flip-flop with a common Clock (CP) and Output Enable (OE) inputs. Features: Wide Operating Voltage Range of 2.0 V to 6.0 V High Speed Oper
Depósito:10000
Mínimo:5
Favorita
DIP14
Texas Instruments
07+
These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.
SN74LS74AN is a dual positive-edge triggered D-type flip-flop with individual data (D) and clock (CP) inputs. It is a 14-pin dual in-line package (DIP) manufactured by Texas Instruments. Description:
Depósito:10000
Mínimo:3
Favorita
Depósito:10000
Mínimo:1
Favorita
SN74107N is a high-level logic device that is part of the 74xx series of integrated circuits. It is a 14-pin DIP (dual in-line package) that contains four independent two-input NAND gates. Descriptio
Depósito:99999
Mínimo:100
Favorita
SOP
NXP Semiconductors
These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.
Manufacturer: NXP Description: The 74HC174D,653 is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A.
Depósito:10000
Mínimo:100
Favorita
DIP-14
Motorola
99
These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.
Description: The MC74ACT74N is a dual D-type flip-flop with individual data, set, reset, and clock inputs and Q and Q outputs. Features: Low Power Consumption High Speed Operation Outputs S
Depósito:10000
Mínimo:4
Favorita
PDIP-20
Texas Instruments
1342+
These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.
Description: The CD74HCT534E is a high-speed CMOS 8-bit buffer/line driver fabricated with silicon gate C2MOS technology. Features: - High-speed operation: tPD = 8.0 ns (typical) at VCC = 5 V - Low p
Depósito:10000
Mínimo:2
Favorita
SOIC-16
Motorola
These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.
Description: The MC74HC174A is an 8-bit D-type flip-flop with a common clock and asynchronous reset. Features: - High speed: tpd = 7.5 ns (typical) at VCC = 5 V - Low power dissipation: ICC = 4 μA (m
Depósito:10000
Mínimo:14
Favorita
Depósito:99799
Mínimo:200
Favorita
sop
NXP Semiconductors
14+
These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.
Manufacturer: NXP Description: Dual D-Type Flip-Flop Features: Low power consumption High noise immunity Low input current High speed operation Outputs source/sink 24 mA Outputs compatib
Depósito:10000
Mínimo:10
Favorita
SOP14
FSC
08+
These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.
Description: The MM74HC74AM is a dual D-type flip-flop with set and reset inputs. Features: Inputs Include Clamp Diodes Outputs Source/Sink 24 mA Latch-Up Performance Exceeds 250 mA Per JESD 78, Cl
Depósito:10000
Mínimo:12
Favorita
DIP-16
National Semiconductor
89+
These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.
Description: The CD40174BCN is a 4-bit static shift register with parallel inputs and serial outputs. Features: 4-bit static shift register Parallel inputs and serial outputs Low power consumptio
Depósito:10000
Mínimo:2
Favorita
Depósito:99999
Mínimo:200
Favorita
SOP14
TI Texas Instruments
1650+
These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.
Description: The SN74ACT74DE4 is a Dual D-Type Flip-Flop with Preset and Clear from Texas Instruments. Features: * Low power consumption * High speed * Low noise * High output drive capability * Inpu
Depósito:10000
Mínimo:5
Favorita
Description: The 74HC574D is an 8-bit D-type flip-flop with 3-state outputs from NXP Semiconductors. Features: High-speed operation: tpd = 10 ns (typical) at VCC = 5 V Low power consumption: I
Depósito:10000
Mínimo:4
Favorita
TSSOP-48
TI Texas Instruments
1719+
These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.
Depósito:10000
Mínimo:5
Favorita
Depósito:99499
Mínimo:500
Favorita
TSSOP
FAI
10+
These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.
Description: The 74LVTH16374MTDX is a 16-bit dual-supply bus transceiver with 3-state outputs. It is designed for asynchronous two-way communication between data buses. Features: Low voltage operati
Depósito:10000
Mínimo:10
Favorita
SOP16
FSC
00+
These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.
Description: The 74ACT175SCX is a high-speed 4-bit register with 3-state outputs. It is designed for use in high-performance memory and bus-oriented systems. Features: High-speed performance: tpd =
Depósito:10000
Mínimo:14
Favorita
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